Programming Guidelines For Flexible Pulse-Per-Second (Pps) Output - Altera cyclone V Technical Reference

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Gating Off the CSR Clock in the TX LPI Mode
1. The MAC RX enters the LPI mode and the RX LPI entry interrupt status [RLPIEN interrupt of Register
12 (
LPI_Control_Status
2. The interrupt pin (
the Register 12 (LPI_Control_Status). †
After the
sbd_intr_o
CSR clock. If the MAC TX is not in the LPI mode when you gate off the CSR clock, the events on the MAC
transmitter do not get reported or updated in the CSR. †
For restoring the CSR clock, wait for the LPI exit indication from the PHY after which the MAC asserts
the LPI exit interrupt on
when Register 12 is read. †
Gating Off the CSR Clock in the TX LPI Mode
The following operations are performed when Bit 16 (LPIEN) of Register 12 (LPI Control and Status
Register) is set: †
1. The Transmit LPI Entry interrupt (TLPIEN bit of Register 12) is set. †
2. The interrupt pin (
the Register 12. †
After the
sbd_intr_o
CSR clock. If the MAC RX is not in the LPI mode when you gate off the CSR clock, the events on the MAC
receiver do not get reported or updated in the CSR. †
To restore the CSR clock, switch on the CSR clock when the MAC has to come out of the TX LPI mode. †
After the CSR clock is resumed, clear Bit 16 (LPIEN) of Register 12 (LPI Control and Status Register) to
bring the MAC out of the LPI mode. †

Programming Guidelines for Flexible Pulse-Per-Second (PPS) Output

Generating a Single Pulse on PPS
To generate single Pulse on PPS: †
1. Program 11 or 10 (for interrupt) in Bits [6:5], TRGTMODSEL, of Register 459 (PPS Control Register)
to instruct the MAC to use the Target Time registers (register 455 and 456) for the start time of PPS
signal output. †
2. Program the start time value in the Target Time registers (register 455 and 456). †
3. Program the width of the PPS signal output in Register 473 (PPS0 Width Register). †
4. Program Bits [3:0], PPSCMD, of Register 459 (PPS Control Register) to 0001 to instruct the MAC to
generate a single pulse on the PPS signal output at the time programmed in the Target Time registers
(register 455 and 456). †
Once the PPSCMD is executed (PPSCMD bits = 0), you can cancel the pulse generation by giving the
Cancel Start Command (PPSCMD=0011) before the programmed start time elapses. You can also
program the behavior of the next pulse in advance. To program the next pulse: †
1. Program the start time for the next pulse in the Target Time registers (register 455 and 456). This time
should be more than the time at which the falling edge occurs for the previous pulse. †
2. Program the width of the next PPS signal output in Register 473 (PPS0 Width Register). †
3. Program Bits [3:0], PPSCMD, of Register 459 (PPS Control Register) to generate a single pulse on the
PPS signal output after the time at which the previous pulse is de-asserted. And at the time
programmed in Target Time registers. If you give this command before the previous pulse becomes
Altera Corporation
)] is set. †
) is asserted. The
sbd_intr_o
interrupt is asserted and the MAC TX is also in the LPI mode, you can gate off the
(synchronous to
lpi_intr_o
) is asserted. The
sbd_intr_o
interrupt is asserted and the MAC RX is also in the LPI mode, you can gate off the
interrupt is cleared when the host reads
sbd_intr_o
). The
clk_rx_i
lpi_intr_o
interrupt is cleared when the host reads
sbd_intr_o
2016.10.28
interrupt is cleared
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