Altera cyclone V Technical Reference page 1290

cv_5v4
2016.10.28
Register
MMC_Transmit_Interrup
t_Mask on page 17-255
txoctetcount_gb
page 17-261
txframecount_gb
page 17-261
txbroadcastframes_g
on page 17-262
txmulticastframes_g
on page 17-263
tx64octets_gb
17-263
tx65to127octets_gb
page 17-264
tx128to255octets_gb
on page 17-265
tx256to511octets_gb
on page 17-265
tx512to1023octets_gb
on page 17-266
tx1024tomaxoctets_gb
on page 17-267
txunicastframes_gb
page 17-268
txmulticastframes_gb
on page 17-268
txbroadcastframes_gb
on page 17-269
txunderflowerror
page 17-270
txsinglecol_g
17-270
txmulticol_g
17-271
txdeferred on page
17-272
txlatecol on page 17-
272
txexesscol on page
17-273
Ethernet Media Access Controller
Send Feedback
Offset Width Acces
0x110
on 0x114
on 0x118
0x11C
0x120
on page 0x124
on 0x128
0x12C
0x130
0x134
0x138
on 0x13C
0x140
0x144
on 0x148
on page 0x14C
on page 0x150
0x154
0x158
0x15C
Reset Value
s
32 RW 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RO 0x0
EMAC Module Address Map
Description
Register 68 (MMC Transmit
Interrupt Mask Register)
Register 69 (txoctetcount_gb
Register)
Register 70 (txframecount_gb
Register)
Register 71 (txbroadcastframes_g
Register)
Register 72 (txmulticastframes_g
Register)
Register 73 (tx64octets_gb
Register)
Register 74 (tx65to127octets_gb
Register)
Register 75 (tx128to255octets_gb
Register)
Register 76 (tx256to511octets_gb
Register)
Register 77 (tx512to1023octets_gb
Register)
Register 78 (tx1024tomaxoctets_
gb Register)
Register 79 (txunicastframes_gb
Register)
Register 80 (txmulticastframes_gb
Register)
Register 81 (txbroadcastframes_gb
Register)
Register 82 (txunderflowerror
Register)
Register 83 (txsinglecol_g
Register)
Register 84 (txmulticol_g
Register)
Register 85 (txdeferred Register)
Register 86 (txlatecol Register)
Register 87 (txexesscol Register)
Altera Corporation
17-75