Altera cyclone V Technical Reference page 1055

Hard processor system
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cv_5v4
2016.10.28
resp1 Fields
Bit
31:0
response1
resp2
Module Instance
sdmmc
Offset:
0x38
Access:
RO
31
30
15
14
resp2 Fields
Bit
31:0
response2
resp3
Module Instance
sdmmc
SD/MMC Controller
Send Feedback
Name
Register represents bit[63:32] of long response. When
CIU sends auto-stop command, then response is
saved in register. Response for previous command
sent by host is still preserved in Response 0 register.
Additional auto-stop issued only for data transfer
commands, and response type is always short for
them.
0xFF704000
29
28
27
26
13
12
11
10
Name
Bit[95:64] of long response
0xFF704000
Description
Base Address
Bit Fields
25
24
23
22
response2
RO 0x0
9
8
7
6
response2
RO 0x0
Description
Base Address
Access
Register Address
0xFF704038
21
20
19
18
5
4
3
2
Access
Register Address
0xFF70403C
14-109
resp2
Reset
RO
0x0
17
16
1
0
Reset
RO
0x0
Altera Corporation

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