Altera cyclone V Technical Reference page 1357

17-142
MAC_Configuration
Bit
10
ipc
9
dr
8
lud
Altera Corporation
Name
When this bit is set, the MAC calculates the 16-bit
ones complement of the ones complement sum of all
received Ethernet frame payloads. It also checks
whether the IPv4 Header checksum (assumed to be
bytes 2526 or 2930 (VLAN-tagged) of the received
Ethernet frame) is correct for the received frame and
gives the status in the receive status word. The MAC
also appends the 16-bit checksum calculated for the
IP header datagram payload (bytes after the IPv4
header) and appends it to the Ethernet frame
transferred to the application (when Type 2 COE is
deselected). When this bit is reset, this function is
disabled. When Type 2 COE is selected, this bit, when
set, enables the IPv4 header checksum checking and
IPv4 or IPv6 TCP, UDP, or ICMP payload checksum
checking. When this bit is reset, the COE function in
the receiver is disabled and the corresponding PCE
and IP HCE status bits are always cleared.
Value
0x1
0x0
When this bit is set, the MAC attempts only one
transmission. When a collision occurs on the GMII or
MII interface, the MAC ignores the current frame
transmission and reports a Frame Abort with
excessive collision error in the transmit frame status.
When this bit is reset, the MAC attempts retries based
on the settings of the BL field (Bits [6:5])​. This bit is
applicable only in the half-duplex mode.
Value
0x1
0x0
This bit indicates whether the link is up or down
during the transmission of configuration in the
RGMII, SGMII, or SMII interface
0x0
0x1
Description
Description
Checksum Enabled
Checksum Disabled
Description
MAC attempts one transmission
MAC attempts retries per bl Field
Value Description
Link Down
Link Up
2016.10.28
Access Reset
RW 0x0
RW 0x0
RW 0x0
Ethernet Media Access Controller
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