Altera cyclone V Technical Reference page 1148

Hard processor system
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cv_5v4
2016.10.28
31
30
15
14
flashcmdrddataup Fields
Bit
31:0
data
flashcmdwrdatalo
Module Instance
qspiregs
Offset:
0xA8
Access:
RW
31
30
15
14
Quad SPI Flash Controller
Send Feedback
29
28
27
26
13
12
11
10
Name
This is the data that is returned by the FLASH device
for any status or configuration read operation carried
out by triggering the event in the control register. The
register will be valid when the polling bit in the
control register is low.
0xFF705000
29
28
27
26
13
12
11
10
Bit Fields
25
24
23
22
data
RW 0x0
9
8
7
6
data
RW 0x0
Description
Base Address
Bit Fields
25
24
23
22
data
RW 0x0
9
8
7
6
data
RW 0x0
flashcmdwrdatalo
21
20
19
18
5
4
3
2
Access
Register Address
0xFF7050A8
21
20
19
18
5
4
3
2
15-59
17
16
1
0
Reset
RW
0x0
17
16
1
0
Altera Corporation

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