Altera cyclone V Technical Reference page 1323

17-108
GMAC Register Group Register Descriptions
Timestamp_Control
This register controls the operation of the System Time generator and the processing of PTP packets for
timestamping in the Receiver.
Sub_Second_Increment
In the Coarse Update mode (TSCFUPDT bit in Register 448), the value in this register is added to the
system time every clock cycle of clk_ptp_ref_i. In the Fine Update mode, the value in this register is added
to the system time whenever the Accumulator gets an overflow.
System_Time_Seconds
The System Time -Seconds register, along with System-TimeNanoseconds register, indicates the current
value of the system time maintained by the MAC. Though it is updated on a continuous basis, there is
some delay from the actual time because of clock domain transfer latencies (from clk_ptp_ref_i to
l3_sp_clk).
System_Time_Nanoseconds
The value in this field has the sub second representation of time, with an accuracy of 0.46 ns. When
TSCTRLSSR is set, each bit represents 1 ns and the maximum value is 0x3B9A_C9FF, after which it rolls-
over to zero.
System_Time_Seconds_Update
The System Time - Seconds Update register, along with the System Time - Nanoseconds Update register,
initializes or updates the system time maintained by the MAC. You must write both of these registers
before setting the TSINIT or TSUPDT bits in the Timestamp Control register.
System_Time_Nanoseconds_Update
Update system time
Timestamp_Addend
This register value is used only when the system time is configured for Fine Update mode (TSCFUPDT bit
in Register 448). This register content is added to a 32-bit accumulator in every clock cycle (of
clk_ptp_ref_i) and the system time is updated whenever the accumulator overflows.
Target_Time_Seconds
The Target Time Seconds register, along with Target Time Nanoseconds register, is used to schedule an
interrupt event (Register 458[1] when Advanced Timestamping is enabled; otherwise, TS interrupt bit in
Register14[9]) when the system time exceeds the value programmed in these registers.
Target_Time_Nanoseconds
Target time
System_Time_Higher_Word_Seconds
System time higher word
Timestamp_Status
Timestamp status. All bits except Bits[27:25] get cleared when the host reads this register.
PPS_Control
Controls timestamp Pulse-Per-Second output
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2016.10.28
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