Altera cyclone V Technical Reference page 1373

Hard processor system
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17-158
VLAN_Tag
Module Instance
emac0
emac1
Offset:
0x1C
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
VLAN_Tag Fields
Bit
19
vthm
18
esvl
17
vtim
Altera Corporation
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
Reserved
13
12
11
10
Name
When set, the most significant four bits of the VLAN
tag's CRC are used to index the content of Register
354 (VLAN Hash Table Register). A value of 1 in the
VLAN Hash Table register, corresponding to the
index, indicates that the frame matched the VLAN
hash table. When Bit 16 (ETV) is set, the CRC of the
12-bit VLAN Identifier (VID) is used for comparison
whereas when ETV is reset, the CRC of the 16-bit
VLAN tag is used for comparison. When reset, the
VLAN Hash Match operation is not performed.
When this bit is set, the MAC transmitter and
receiver also consider the S-VLAN (Type = 0x88A8)
frames as valid VLAN tagged frames.
When set, this bit enables the VLAN Tag inverse
matching. The frames that do not have matching
VLAN Tag are marked as matched. When reset, this
bit enables the VLAN Tag perfect matching. The
frames with matched VLAN Tag are marked as
matched.
Base Address
0xFF700000
0xFF702000
Bit Fields
25
24
23
22
9
8
7
6
vl
RW 0x0
Description
Register Address
0xFF70001C
0xFF70201C
21
20
19
18
vthm
esvl
RW
RW
0x0
0x0
5
4
3
2
Access
Ethernet Media Access Controller
cv_5v4
2016.10.28
17
16
vtim
etv
RW
RW 0x0
0x0
1
0
Reset
RW
0x0
RW
0x0
RW
0x0
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