Altera cyclone V Technical Reference page 1066

Hard processor system

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fifo_tx_watermark

fifo_rx_watermark

DMA and FIFO Control Fields.

Module Instance

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by

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FIFO is empty status.

FIFO reached Transmit watermark level; not qualified

with data transfer.

FIFO reached Receive watermark level; not qualified

with data transfer

software or hardware. Any area of the memory map that is not explicitly defined as a register

space or accessible memory is considered reserved.

FIFO is empty

FIFO not empty

FIFO reached transmit watermark level: not

qualified with data transfer.

FIFO not at transmit watermark Level

FIFO reached watermark level; not qualified

with data transfer.

FIFO not at watermark Level

Base Address

SD/MMC Controller

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