Altera cyclone V Technical Reference page 1087

cv_5v4
2016.10.28
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
Reserved
15 14
cardthrctl Fields
Bit
27:16
cardrdthreshold
0
cardrdthren
back_end_power_r
See Field Description
Module Instance
sdmmc
Offset:
0x104
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
SD/MMC Controller
Send Feedback
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
Name
Card Read Threshold size
Host Controller initiates Read Transfer only if
CardRdThreshold amount of space is available in
receive FIFO.
Value
0x1
0x0
0xFF704000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
Bit Fields
25 24 23 22
cardrdthreshold
RW 0x0
9 8 7 6
Reserved
Description
Description
Card Read Threshold is enabled
Card Read Threshold is disabled
Base Address
back_end_power_r
21 20 19 18
5 4 3 2
Access
Register Address
0xFF704104
14-141
17 16
1 0
cardrdth
ren
RW 0x0
Reset
RW 0x0
RW 0x0
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