Altera cyclone V Technical Reference page 1124

Hard processor system
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cv_5v4
2016.10.28
31
30
15
14
Reserved
dmaper Fields
Bit
11:8
numburstreqbytes
3:0
numsglreqbytes
remapaddr
This register is used to remap an incoming AHB address to a different address used by the FLASH device.
Module Instance
qspiregs
Offset:
0x24
Access:
RW
31
30
15
14
Quad SPI Flash Controller
Send Feedback
29
28
27
26
13
12
11
10
numburstreqbytes
RW 0x0
Name
Number of bytes in a burst type request on the DMA
peripheral request. A programmed value of 0
represents a single byte. This should be setup before
starting the indirect read or write operation. The
actual number of bytes used is 2**(value in this
register) which will simplify implementation.
Number of bytes in a single type request on the DMA
peripheral request. A programmed value of 0
represents a single byte. This should be setup before
starting the indirect read or write operation. The
actual number of bytes used is 2**(value in this
register) which will simplify implementation.
0xFF705000
29
28
27
26
13
12
11
10
Bit Fields
25
24
23
22
Reserved
9
8
7
6
Reserved
Description
Base Address
Bit Fields
25
24
23
22
value
RW 0x0
9
8
7
6
value
RW 0x0
remapaddr
21
20
19
18
5
4
3
2
numsglreqbytes
RW 0x0
Access
Register Address
0xFF705024
21
20
19
18
5
4
3
2
15-35
17
16
1
0
Reset
RW
0x0
RW
0x0
17
16
1
0
Altera Corporation

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