Altera cyclone V Technical Reference page 1193

16-42
DMALPEND[S | B]
Note: The DMAC saves the value of the PC for the instruction that follows
executes
instruction in the loop.
Figure 16-16: DMALP Instruction Encoding
Assembler syntax
DMALP <loop_iterations>
where:
<loop_iterations>
Specifies the number of loops to perform, range 1-256.
• The assembler determines the loop counter register to use and either:
• Sets
lc
• Sets
lc
Operation
You can only use this instruction in a DMA channel thread.
DMALPEND[S | B]
Loop End indicates the last instruction in the program loop but the behavior of the DMAC depends on
whether
DMALP
• The loop has a defined loop count and
DMALP
the loop counter register. If a loop counter register returns:
• Zero—The DMAC executes a
• Nonzero—The DMAC decrements the value in the loop counter register and updates the thread PC
to contain the address of the first instruction in the program loop, that is, the instruction that
follows the
•
DMALPFE
to control when it exits the loop. If the
• 0—The DMAC updates the thread PC to contain the address of the first instruction in the program
loop, that is, the instruction that follows the
• 1—The DMAC executes a
Figure 16-17: DMALPEND[S|B] Instruction Encoding
Altera Corporation
, and the loop counter register is not zero, this enables it to execute the first
DMALPEND
15
to 0, and the DMAC writes the value loop_iterations minus 1 to the loop counter 0 registers
to 1, and the DMAC writes the value loop_iterations minus 1 to the loop counter 1 registers.
or starts the loop. If a loop starts with:
DMALPFE
.
DMALP
The loop has an undefined loop count and the DMAC uses the state of the
DMANOP
15
backwards_jump[7:0]
8 7 6 5 4 3 2 1 0
0 0 1
iter[7:0]
DMALPEND[S|B]
and therefore exits the loop.
DMANOP
flag is:
request_last
.
DMALP
and therefore exits the loop.
8 7 6 5 4 3 2 1 0
0 0 nf
1
. After the DMAC
DMALP
0
0 0 0 1c
instructs the DMAC to read the value of
lc bs x
1
cv_5v4
2016.10.28
flag
request_last
DMA Controller
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