Altera cyclone V Technical Reference page 1250

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Table 17-6: Transmit Descriptor Word 1 (TDES1)

TBS2: Transmit Buffer 2 Size

This field indicates the second data buffer size in bytes. This field is not valid if TDES0[20] is

TBS1: Transmit Buffer 1 Size

This field indicates the first data buffer byte size, in bytes. If this field is 0, the DMA ignores this

buffer and uses Buffer 2 or the next descriptor, depending on the value of TCH (TDES0[20]).

Table 17-7: Transmit Descriptor 2 (TDES2)

Buffer 1 Address Pointer

These bits indicate the physical address of Buffer 1. There is no limitation on the buffer address

Table 17-8: Transmit Descriptor 3 (TDES3)

Buffer 2 Address Pointer (Next Descriptor Address)

Indicates the physical address of Buffer 2 when a descriptor ring structure is used. If the Second

Address Chained (TDES0[20]) bit is set, this address contains the pointer to the physical

memory where the Next descriptor is present. The buffer address pointer must be aligned to the

bus width only when TDES0[20] is set. (LSBs are ignored internally.)

Table 17-9: Transmit Descriptor 6 (TDES6)

TTSL: Transmit Frame Timestamp Low

This field is updated by DMA with the least significant 32 bits of the timestamp captured for the

corresponding transmit frame. This field has the timestamp only if the Last Segment bit (LS) in

the descriptor is set and Timestamp status (TTSS) bit is set.

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