Indirect Write Operation With Dma Enabled - Altera cyclone V Technical Reference

cv_5v4
2016.10.28
7. Start the indirect write operation by setting the
8. Either use the watermark level interrupt or poll the SRAM fill level in the
determine when there is sufficient space in the SRAM.
9. Issue a write transaction to the indirect address to write one flash page of data to the SRAM. Repeat
step 8
if more write transactions are needed to complete the indirect write transfer. The final write may
be less than one page of data.
Related Information
Indirect Write Operation
•
Setting Up the Quad SPI Flash Controller
•

Indirect Write Operation with DMA Enabled

The following steps describe the general software flow to set up the quad SPI controller for indirect write
operation with the DMA enabled:
1. Perform the steps described in the
2. Set the flash memory start address in the
3. Set the number of bytes to be transferred in the
4. Set the indirect transfer trigger address in the
5. Set the number of bytes for single and burst type DMA transfers in the
6. Optionally set the SRAM watermark level in the
are issued. The value set must be greater than one flash page. For more information, refer to the
Indirect Write Operation
7. Start the indirect write access by setting the
8. Either use the indirect complete interrupt to determine when the indirect write operation has
completed or poll the completion status of the indirect write operation through the
ind_ops_done_status
Related Information
Indirect Write Operation
•
• Setting Up the Quad SPI Flash Controller
XIP Mode Operations
XIP mode is supported in most SPI flash devices. However, flash device manufacturers do not use a
consistent standard approach. Most use signature bits that are sent to the device immediately following the
address bytes. Some devices use signature bits and also require a flash device configuration register write
to enable XIP mode.
Quad SPI Flash Controller
Send Feedback
start
on page 15-6
on page 15-15
Setting Up the Quad SPI Flash Controller
indwrstaddr
indcnt
indaddrtrig
indwrwater
on page 15-6 section.
start
field of the register.
indwr
on page 15-6
on page 15-15
Indirect Write Operation with DMA Enabled
field of the register to 1.
indwr
sramfill
register.
field of the register.
indwr
register.
dmaper
register to control the rate DMA requests
field of the register to 1.
indirwr
15-17
register to
on page 15-15 section.
register.
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