Altera cyclone V Technical Reference page 1077

cv_5v4
2016.10.28
Module Instance
sdmmc
Offset:
0x78
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
15 14
rst_n Fields
Bit
0
card_reset
bmod
Details different bus operating modes.
Module Instance
sdmmc
Offset:
0x80
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
SD/MMC Controller
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0xFF704000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
Name
This bit causes the cards to enter pre-idle state, which
requires it to be re-initialized.
Value
0x1
0x0
0xFF704000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
Base Address
Bit Fields
25 24 23 22
Reserved
9 8 7 6
Reserved
Description
Description
Active Mode
Not Active Mode
Base Address
Register Address
0xFF704078
21 20 19 18
5 4 3 2
Access
Register Address
0xFF704080
14-131
bmod
17 16
1 0
card_
reset
RW 0x1
Reset
RW 0x1
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