Altera cyclone V Technical Reference page 1059

Hard processor system
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cv_5v4
2016.10.28
Bit
5
rxfifodr
4
dttxfifodr
3
dt
2
cmd_done
1
resp
0
cd
SD/MMC Controller
Send Feedback
Name
Interrupt enabled only if corresponding bit in
interrupt mask register is set.
Value
0x0
0x1
Interrupt enabled only if corresponding bit in
interrupt mask register is set.
Value
0x0
0x1
Interrupt enabled only if corresponding bit in
interrupt mask register is set.
Value
0x0
0x1
Interrupt enabled only if corresponding bit in
interrupt mask register is set.
Value
0x0
0x1
Interrupt enabled only if corresponding bit in
interrupt mask register is set.
Value
0x0
0x1
Interrupt enabled only if corresponding bit in
interrupt mask register is set.
Value
0x0
0x1
Description
Description
Receive FIFO data request Mask
Receive FIFO data request No Mask
Description
Transmit FIFO data request Mask
Transmit FIFO data request No Mask
Description
Data transfer over Mask
Data transfer over No Mask
Description
Command Done Mask
Command Done No Mask
Description
Response error Mask
Response error No Mask
Description
Card Detected Mask
Card Detected No Mask
14-113
mintsts
Access
Reset
RO
0x0
RO
0x0
RO
0x0
RO
0x0
RO
0x0
RO
0x0
Altera Corporation

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