Altera cyclone V Technical Reference page 1135

Hard processor system
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15-46
indrd
wrprot Fields
Bit
1
en
0
inv
indrd
Module Instance
qspiregs
Offset:
0x60
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
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Name
When enabled, any AHB write access with an address
within the protection region defined in the lower and
upper write protection registers is rejected. An AHB
error response is generated and an interrupt source
triggered. When disabled, the protection region is
disabled.
Value
0x1
0x0
When enabled, the protection region defined in the
lower and upper write protection registers is inverted
meaning it is the region that the system is permitted
to write to. When disabled, the protection region
defined in the lower and upper write protection
registers is the region that the system is not permitted
to write to.
Value
0x1
0x0
0xFF705000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
Description
Description
AHB Write Access rejected
Protection Region Disabled
Description
Write Region allowed
Write Region not allowed
Base Address
0xFF705060
2016.10.28
Access
Reset
RW
0x0
RW
0x0
Register Address
Quad SPI Flash Controller
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cv_5v4

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