Altera cyclone V Technical Reference page 1245

Hard processor system
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17-30
Transmit Descriptor
Figure 17-10: Transmit Enhanced Descriptor Fields - Format
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
O
TDES0
W
Ctrl [30:26]
N
TDES1
RES
T
E D
2 S
T
E D
3 S
T
E D
4 S
T
E D
5 S
T
E D
6 S
T
E D
7 S
The DMA always reads or fetches four DWORDS of the descriptor from system memory to obtain the
buffer and control information.
Altera Corporation
T
T
Ctrl [24:18]
S
E
Buffer 2 Byte Count [28:16]
u B
r e f f
A 2
r d d
s s e
T
n a r
T
n a r
T
T
Status [16:7]
S
S
RES
u B
r e f f
A 1
r d d
s s e
1 3 [
] 0 :
3 [
0 : 1
o ]
N r
x e
D t
s e
i r c
o t p
A r
r d d
R
s e
v r e
d e
R
s e
v r e
d e
m s
T t i
m i
t s e
m a
L p
w o
1 3 [
] 0 :
m s
T t i
m i
t s e
m a
H p
h g i
1 3 [
] 0 :
9
8
7
6
5
4
Ctrl/Status
[6:3]
Buffer 1 Byte Count [12:0]
s s e
1 3 [
] 0 :
Ethernet Media Access Controller
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cv_5v4
2016.10.28
3
2
1
0
Status
[2:0]

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