Altera cyclone V Technical Reference page 1237

17-22
TX DMA Operation: OSF Mode
In OSF mode, the Run state transmit DMA operates in the following sequence:
1. The DMA operates as described in steps 1 - 6 of the
on page 17-19 section.
2. Without closing the previous frame's last descriptor, the DMA fetches the next descriptor.
3. If the DMA owns the acquired descriptor, the DMA decodes the transmit buffer address in this
descriptor. If the DMA does not own the descriptor, the DMA goes into Suspend mode and skips to
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step 7.
4. The DMA fetches the transmit frame from the Host memory and transfers the frame to the MTL until
the End-of-frame data is transferred, closing the intermediate descriptors if this frame is split across
multiple descriptors.
5. The DMA waits for the previous frame's frame transmission status and timestamp. Once the status is
available, the DMA writes the timestamp to TDES2 and TDES3, if such timestamp was captured (as
indicated by a status bit). The DMA then writes the status, with a cleared Own bit, to the corresponding
TDES0, thus closing the descriptor. If timestamping was not enabled for the previous frame, the DMA
does not alter the contents of TDES2 and TDES3.
6. If enabled, the transmit interrupt is set, the DMA fetches the next descriptor, then proceeds to
(when Status is normal). If the previous transmission status shows an underflow error, the DMA goes
into Suspend mode (
7. In Suspend mode, if a pending status and timestamp are received from the MTL, the DMA writes the
timestamp (if enabled for the current frame) to TDES2 and TDES3, then writes the status to the
corresponding TDES0. It then sets relevant interrupts and returns to Suspend mode.
8. The DMA can exit Suspend mode and enter the Run state (go to
status) only after receiving a Transmit Poll demand (Register 1 (Transmit Poll Demand Register).
Note: As the DMA fetches the next descriptor in advance before closing the current
descriptor, the descriptor chain should have more than two different descriptors for
correct and proper operation.
Altera Corporation
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†
step 7).
†
TX DMA Operation: Default (Non-OSF) Mode
†
step 1 or step 2
2016.10.28
†
†
step 3
†
depending on pending
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