Altera cyclone V Technical Reference page 1086

14-140
bufaddr
dscaddr Fields
Bit
31:0
hda
bufaddr
See Field Description.
Module Instance
sdmmc
Offset:
0x98
Access:
RO
31 30
15 14
bufaddr Fields
Bit
31:0
hba
cardthrctl
See Field descriptions
Module Instance
sdmmc
Offset:
0x100
Altera Corporation
Name
Cleared on reset. Pointer updated by IDMAC during
operation. This register points to the start address of
the current descriptor read by the IDMAC.
29 28 27 26
13 12 11 10
Name
Cleared on Reset. Pointer updated by IDMAC during
operation. This register points to the current Data
Buffer Address being accessed by the IDMAC.
Description
Base Address
0xFF704000
Bit Fields
25 24 23 22
hba
RO 0x0
9 8 7 6
hba
RO 0x0
Description
Base Address
0xFF704000
Access
Register Address
0xFF704098
21 20 19 18
5 4 3 2
Access
Register Address
0xFF704100
cv_5v4
2016.10.28
Reset
RO 0x0
17 16
1 0
Reset
RO 0x0
SD/MMC Controller
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