Data Slave Interface - Altera cyclone V Technical Reference

15-4

Data Slave Interface

Data Slave Interface
The quad SPI flash controller uses the data slave interface for direct, indirect, and SPI legacy mode
accesses.
The data slave interface is 32 bits wide and permits byte, half-word, and word accesses. For write accesses,
incrementing burst lengths of 1, 4, 8 and 16 are supported. For read accesses, all burst types and sizes are
supported.
Direct Access Mode
Direct access mode is memory mapped and can be used to both access and directly execute code from
external FLASH memory. Any incoming AMBA data slave interface access that is not recognized as being
within the programmable indirect trigger region is assumed to be a direct access and is serviced by the
direct access controller.
Note: Accesses that use the direct access controller do not use the embedded SRAM.
Data Slave Remapping Example
Figure 15-2: Data Slave Remapping Example
To remap the data slave to access other 1 MB regions of the flash device, enable address remapping in the
enable ARM
register. All incoming data slave accesses remap to the offset specified in the remap address register
(
remapaddr
The 20 LSBs of incoming addresses are used for accessing the 1 MB region and the higher bits are ignored.
Note: The quad SPI controller does not issue any error status for accesses that lie outside the connected
flash memory space.
Altera Corporation
Data
1 MB
Slave
Address Range
Access
Data Slave
® AMBA ® advanced high speed bus (AHB) address remapping field (
).
Map to Offset
0x00200000
Map to Offset 0
16-MB Flash Memory
Offsets
0x01000000
0x00300000
0x00200000
0x00100000
0x00000000
) of the
enahbremap
Quad SPI Flash Controller
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cv_5v4
2016.10.28
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