Altera cyclone V Technical Reference page 1200

Hard processor system
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cv_5v4
2016.10.28
Figure 16-25: DMAWFE Instruction Encoding
Assembler syntax
DMAWFE <event_num>
where:
<event_num>
[invalid]
DMA thread. If
the instruction cache for the current DMA.
• The DMAC aborts the thread if you select an event number that is not available for your configuration
of the DMAC. To ensure cache coherency, you must use
tion stream for a DMA channel.
Operation
You can use the instruction with the DMA manager thread and the DMA channel thread.
Related Information
Using Events and Interrupts
DMAWFP
Wait For Peripheral instructs the DMAC to halt execution of the thread until the specified peripheral
signals a DMA request for that DMA channel.
Figure 16-26: DMAWFP Instruction Encoding
Assembler syntax
DMAWFP <peripheral>
where:
<peripheral>
Note: The DMAC aborts the thread if you select a peripheral number that is not available.
DMA Controller
Send Feedback
15
event_num[4:0]
[,
]
invalid
5-bit immediate, value 0-31
Sets
to 1. If
is present, the DMAC invalidates the instruction cache for the current
i
invalid
is not present, then the assembler sets
invalid
on page 16-21
15
peripheral[4:0]
,
<single|burst|periph>
5-bit immediate, value 0-31
11
10
9
8
7 6 5 4 3 2 1 0
0
i 0
0
0
1
1
invalid
11
10
9
8
7 6 5 4 3 2 1 0
0 0
0
0
0
1 0 0
1
DMAWFP
0
1 1
0
to 0 and the DMAC does not invalidate
i
when a processor writes the instruc‐
p
bs
16-49
Altera Corporation

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