Altera cyclone V Technical Reference page 1122

cv_5v4
2016.10.28
devsz Fields
Bit
20:16
bytespersubsector
15:4
bytesperdevicepage
3:0
numaddrbytes
srampart
Module Instance
qspiregs
Offset:
0x18
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
15 14
srampart Fields
Bit
6:0
addr
Quad SPI Flash Controller
Send Feedback
Name
Number of bytes per Block. This is required by the
controller for performing the write protection logic.
The number of bytes per block must be a power of 2
number.
Number of bytes per device page. This is required by
the controller for performing FLASH writes up to and
across page boundaries.
Number of address bytes. A value of 0 indicates 1
byte.
0xFF705000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
Reserved
Name
Defines the size of the indirect read partition in the
SRAM, in units of SRAM locations. By default, half of
the SRAM is reserved for indirect read operations and
half for indirect write operations.
Description
Base Address
Bit Fields
25 24 23 22
Reserved
9 8 7 6
Description
srampart
Access
Register Address
0xFF705018
21 20 19 18
5 4 3 2
addr
RW 0x40
Access
15-33
Reset
RW 0x10
RW 0x100
RW 0x2
17 16
1 0
Reset
RW 0x40
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