Assembler Directives - Altera cyclone V Technical Reference

Hard processor system
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16-50
DMAWMB
<single>
after it receives a single or burst DMA request. The DMAC sets the
channel.
Sets
<burst>
after it receives a burst DMA request. The DMAC sets the
Note: The DMAC ignores single burst DMA requests.
<periph>
after it receives a single or burst DMA request. The DMAC sets the
• Single: When it receives a single DMA request.
• Burst: When it receives a burst DMA request.
Operation
You can only use this instruction in a DMA channel thread.
DMAWMB
Write Memory Barrier forces the DMA channel to wait until all of the executed
channel have been issued on the AXI master interface and have completed.
This permits read-after-write sequences to the same address location with no hazards.
Figure 16-27: DMAWMB Instruction Encoding
Assembler syntax
DMAWMB
Operation
You can only use this instruction in a DMA channel thread.

Assembler Directives

The assembler provides several additional commands.
DCD
Assembler directive to place a 32-bit immediate in the instruction stream.
Syntax
DCD imm32
DCB
Assembler directive to place an 8-bit immediate in the instruction stream.
Syntax
Altera Corporation
Sets
to 0 and
to 0. This instructs the DMAC to continue executing the DMA channel thread
bs
p
to 1 and
to 0. This instructs the DMAC to continue executing the DMA channel thread
bs
p
Sets
to 0 and
to 1. This instructs the DMAC to continue executing the DMA channel thread
bs
p
request_type
7 6 5 4 3 2 1 0
0
0
0
1 0 0 1
1
to Single, for that DMA
request_type
to Burst.
to:
request_type
instructions for that
DMAST
cv_5v4
2016.10.28
DMA Controller
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