Altera cyclone V Technical Reference page 1199

16-48
DMASTZ
Assembler syntax
DMASTP<S|B> <peripheral>
where:
Sets
<S> bs
• A single DMA store operation if
• The DMAC ignores the state of the dst_burst_len field in the channel control registers and always
performs an AXI transfer with a burst length of one.
• A
DMANOP
Sets
<B> bs
• The DMA store if
• A
DMANOP
<peripheral>
Note: The DMAC sets the value of the
Operation
You can only use this instruction in a DMA channel thread.
The DMAC only commences the burst when the MFIFO buffer contains all of the data necessary to
complete the burst transfer.
Related Information
DMAWFP
DMASTZ
Store Zero instructs the DMAC to store zeros, using AXI transactions that the destination address
registers and channel control registers specify. If the
incrementing, the DMAC updates the destination address registers after it executes
Figure 16-24: DMASTZ Instruction Encoding
Assembler syntax
DMASTZ
Operation
You can only use this instruction in a DMA channel thread.
DMAWFE
Wait For Event instructs the DMAC to halt execution of the thread until the event, that <event_num>
specifies, occurs. When the event occurs, the thread moves to the Executing state and the DMAC clears
the event.
Altera Corporation
to 0. This instructs the DMAC to perform:
if is programmed to Burst.
request_type
to 1. This instructs the DMAC to perform:
request_type
if is programmed to Single.
request_type
5-bit immediate, value 0-31.
on page 16-49
is programmed to Single
request_type
is programmed to Burst
flag when it executes a
request_type
dst_inc
7 6 5 4 3 2 1 0
0 0 0 0 1 1 0 0
instruction.
DMAWFP
bit in the channel control registers is set to
DMASTZ
cv_5v4
2016.10.28
.
DMA Controller
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