Qspi Flash Controller Module Registers Address Map - Altera cyclone V Technical Reference

15-20

QSPI Flash Controller Module Registers Address Map

QSPI Flash Controller Module Registers Address Map
Registers in the QSPI Flash Controller module accessible via its APB slave
Base Address:
QSPI Flash Controller Module Registers
Register
cfg on page 15-21
devrd on page 15-26
devwr on page 15-29
delay on page 15-30
rddatacap on page 15-
31
devsz on page 15-32
srampart on page 15-
33
indaddrtrig
15-34
dmaper on page 15-34
remapaddr on page 15-
35
modebit on page 15-
36
sramfill on page 15-
36
txthresh on page 15-
37
rxthresh on page 15-
38
irqstat on page 15-
38
irqmask on page 15-
41
lowwrprot on page 15-
43
uppwrprot on page 15-
44
wrprot on page 15-45
indrd on page 15-46
Altera Corporation
0xFF705000
Offset
0x0
0x4
0x8
0xC
0x10
0x14
0x18
on page 0x1C
0x20
0x24
0x28
0x2C
0x30
0x34
0x40
0x44
0x50
0x54
0x58
0x60
Width Acces Reset Value
s
32 RW 0x780000
32 RW 0x3
32 RW 0x2
32 RW 0x0
32 RW 0x1
32 RW 0x101002
32 RW 0x40
32 RW 0x0
32 RW 0x0
32 RW 0x0
32 RW 0x0
32 RO 0x0
32 RW 0x1
32 RW 0x1
32 RW 0x100
32 RW 0x0
32 RW 0x0
32 RW 0x0
32 RW 0x0
32 RW 0x0
Description
QSPI Configuration Register
Device Read Instruction Register
Device Write Instruction Register
QSPI Device Delay Register
Read Data Capture Register
Device Size Register
SRAM Partition Register
Indirect AHB Address Trigger
Register
DMA Peripheral Register
Remap Address Register
Mode Bit Register
SRAM Fill Register
TX Threshold Register
RX Threshold Register
Interrupt Status Register
Interrupt Mask
Lower Write Protection Register
Upper Write Protection Register
Write Protection Register
Indirect Read Transfer Register
Quad SPI Flash Controller
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cv_5v4
2016.10.28