Altera cyclone V Technical Reference page 1158

cv_5v4
2016.10.28
The following list describes the Thread Operating states:
Stopped
The thread has an invalid PC (Program Counter) and it is not fetching instructions. Depending on the
thread type, you can cause the thread to move to the Executing state by all of the following:
• DMA manager thread—Issuing the DMAGO instruction through the slave interface
• DMA channel thread—Programming the DMA manager thread to execute
thread in the Stopped state
Executing
The thread has a valid PC and therefore the DMAC includes the thread when it arbitrates. The thread can
then change to one of the following states under the following conditions:
• Stopped—When the DMA manager thread executes
• Cache Miss—When the instruction cache does not contain the next instruction for either the DMA
manager thread or the DMA channel thread
• Updating PC—When the DMAC calculates the address of the next access in the cache
• Waiting for Event—When a thread executes
• At Barrier—When a DMA channel thread either:
• Executes
• Updates control registers that affect alignment during a DMA Cycle
• Waiting for Peripheral—When a DMA channel thread executes
• Killing—When a DMA channel thread executes
• Faulting Completing—For a DMA channel thread when either:
• The thread executes an undefined or invalid instruction
• An AXI error occurs during an instruction fetch or data transfer
• Faulting—For the DMA manager thread when either:
• The thread executes an undefined or invalid instruction
• An AXI error occurs during an instruction fetch
For a DMA channel thread when a watchdog timeout abort occurs.
• Completing—When a DMA channel thread executes
Cache Miss
The thread is stalled and the DMAC is performing a cache line fill. After it completes the cache fill, the
thread returns to the Executing state.
Updating PC
The DMAC is calculating the address of the next access in the cache. After it calculates the PC, the thread
returns to the Executing state.
Waiting For Event
The thread is stalled and is waiting for the DMAC to execute
number. After the corresponding event occurs, the thread returns to the Executing state.
DMA Controller
Send Feedback
, , or
DMARMB DMAWMB DMAFLUSHP
DMAEND
DMAWFE
DMAWFP
DMAKILL
DMAEND
using the corresponding event
DMASEV
16-7
Operating States
for a DMA channel
DMAGO
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