Altera cyclone V Technical Reference page 1051

Hard processor system
Hide thumbs Also See for cyclone V:
Table of Contents

Advertisement

cv_5v4
2016.10.28
Bit
15
send_initialization
14
stop_abort_cmd
13
wait_prvdata_complete
SD/MMC Controller
Send Feedback
Name
After power on, 80 clocks must be sent to the card for
initialization before sending any commands to card.
Bit should be set while sending first command to card
so that controller will initialize clocks before sending
command to card. This bit should not be set for either
of the boot modes (alternate or mandatory).
Value
0x0
0x1
When open-ended or predefined data transfer is in
progress, and host issues stop or abort command to
stop data transfer, bit should be set so that command/
data state-machines of CIU can return correctly to
idle state. This is also applicable for Boot mode
transfers. To Abort boot mode, this bit should be set
along with CMD[26] = disable_boot. Note: If abort is
sent to function-number currently selected or not in
data-transfer mode, then bit should be set to 0.
Value
0x0
0x1
Determines when command is sent. The send
command at once option is typically used to query
status of card during data transfer or to stop current
data transfer.
Value
0x0
0x1
Description
Description
Do not send initialization sequence (80
clocks of 1) before sending this command
Send initialization sequence before sending
this command
Description
Don't stop or abort command to stop current
data transfer in progress
Stop or Abort command, intended to stop
current data transfer in progress
Description
Send command at once
Wait for previous data transfer completion
14-105
cmd
Access
Reset
RW
0x0
RW
0x0
RW
0x0
Altera Corporation

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents