Altera cyclone V Technical Reference page 1125

15-36
modebit
remapaddr Fields
Bit
31:0
value
modebit
Module Instance
qspiregs
Offset:
0x28
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
15 14
modebit Fields
Bit
7:0
mode
sramfill
Module Instance
qspiregs
Altera Corporation
Name
This offset is added to the incoming AHB address to
determine the address used by the FLASH device.
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
Reserved
Name
These are the 8 mode bits that are sent to the device
following the address bytes if mode bit transmission
has been enabled.
Description
Base Address
0xFF705000
Bit Fields
25 24 23 22
Reserved
9 8 7 6
Description
Base Address
0xFF705000
Access
Register Address
0xFF705028
21 20 19 18
5 4 3 2
mode
RW 0x0
Access
Register Address
0xFF70502C
Quad SPI Flash Controller
cv_5v4
2016.10.28
Reset
RW 0x0
17 16
1 0
Reset
RW 0x0
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