Altera cyclone V Technical Reference page 1196

cv_5v4
2016.10.28
A 32-bit value that is written to the specified destination register.
Note: For information about using the assembler to program the various fields that the channel control
registers, refer to DMAMOV CCR section
Operation
You can only use this instruction in a DMA channel thread.
Related Information
DMAMOV CCR
Information about using the assembler to program the various fields that the channel control registers
DMANOP
No Operation does nothing. You can use this instruction for code alignment purposes.
Figure 16-19: DMANOP Instruction Encoding
Assembler syntax
DMANOP
Operation
You can use the instruction with the DMA manager thread and the DMA channel thread.
DMARMB
Read Memory Barrier forces the DMA channel to wait until all of the executed
channel have been issued on the AXI master interface and have completed.
This enables write-after-read sequences to the same address location with no hazards.
Figure 16-20: DMARMB Instruction Encoding
Assembler syntax
DMARMB
Operation
You can only use this instruction in a DMA channel thread.
DMA Controller
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7 6 5 4 3 2 1 0
0 0
7 6 5 4 3 2 1 0
0
0 1 1 0 0 0
0 0 1 0 0 1 0
16-45
DMANOP
instructions for that
DMALD
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