Altera cyclone V Technical Reference page 1202

cv_5v4
2016.10.28
DCB imm8
DMALP
Assembler directive to insert an iterative loop.
Syntax
DMALP [<LC0>|<LC1>]
where:
<loop_iterations>
An 8-bit value that specifies the number of loops to perform.
Note: For clarity in writing assembler instructions, the 8-bit value is the actual number of iterations of the
loop to be executed. The assembler decrements this by one to create the actual value, 0-255, that the
DMAC uses.
If
[LC0] LC0
If
[LC1] LC1
Note: If
LC0
DMALPFE
Assembler directive to insert a repetitive loop.
Syntax
DMALPFE
Enables the assembler to clear the
DMAMOV CCR
Assembler directive that enables you to program the channel control registers using the specified format.
Syntax
DMAMOV CCR,
[SB<1-16>] [SS<8|16|32|64|128>] [SA<I|F>]
[SP<imm3>] [SC<imm4>]
[DB<1-16>] [DS<8|16|32|64|128>] [DA<I|F>]
[DP<imm3>] [DC<imm4>]
[ES<8|16|32|64|128>]
Table 16-6: DMAMOV CCR Argument Description and Default Values
Syntax
SA Source address increment. Sets the value of
arburst[0]
DMA Controller
Send Feedback
<loop_iterations>
is present, the DMAC stores
is present, the DMAC stores
or is not present, the assembler determines the loop counter register to use.
LC1
bit that is present in
nf
Description
in the loop counter 0 registers.
<loop_iterations>
in the loop counter 1 registers.
<loop_iterations>
DMALPEND[S | B]
I = Increment
F = Fixed
DMALP
.
Options Default
Altera Corporation
16-51
I