Altera cyclone V Technical Reference page 1088

Hard processor system
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14-142
data
31
30
15
14
back_end_power_r Fields
Bit
15:0
back_end_power
data
Provides read/write access to data FIFO. Addresses 0x200 and above are mapped to the data FIFO. More
than one address is mapped to data FIFO so that FIFO can be accessed using bursts.
Module Instance
sdmmc
Offset:
0x200
Access:
RW
31
30
15
14
Altera Corporation
29
28
27
26
13
12
11
10
Name
Back end power operation.
Value
0x1
0x0
29
28
27
26
13
12
11
10
Bit Fields
25
24
23
22
Reserved
9
8
7
6
back_end_power
RW 0x0
Description
Description
Back-end Power supplied to card only 1 card
Off Reset
Base Address
0xFF704000
Bit Fields
25
24
23
22
value
RW 0x0
9
8
7
6
value
RW 0x0
21
20
19
18
5
4
3
2
Access
Register Address
0xFF704200
21
20
19
18
5
4
3
2
cv_5v4
2016.10.28
17
16
1
0
Reset
RW
0x0
17
16
1
0
SD/MMC Controller
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