Working With The Mpu - Altera Nios II User Manual

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3–28
Copy the zero register from the normal register set to all shadow register sets,
using the wrprs instruction.

Working with the MPU

This section provides a basic overview of MPU initialization and the MPU region read
and write operations.
MPU Region Read and Write Operations
MPU region read and write operations are operations that access MPU region
attributes through the mpubase and mpuacc control registers. The mpubase.BASE,
mpuacc.MASK, mpuacc.LIMIT, mpuacc.C, and mpuacc.PERM fields comprise the MPU
region attributes.
MPU region read operations retrieve the current values for the attributes of a region.
Each MPU region read operation consists of the following actions:
Execute a wrctl instruction to the mpubase register with the mpubase.INDEX and
mpubase.D fields set to identify the MPU region.
Execute a wrctl instruction to the mpuacc register with the mpuacc.RD field set to
one and the mpuacc.WR field cleared to zero. This action loads the mpubase and
mpuacc register values.
Execute a rdctl instruction to the mpubase register to read the loaded the mpubase
register value.
Execute a rdctl instruction to the mpuacc register to read the loaded the mpuacc
register value.
The MPU region read operation retrieves mpubase.BASE, mpuacc.MASK or
mpuacc.LIMIT, mpuacc.C, and mpuacc.PERM values for the MPU region.
1
Values for the mpubase register are not actually retrieved until the wrctl instruction to
the mpuacc register is performed.
MPU region write operations set new values for the attributes of a region. Each MPU
region write operation consists of the following actions:
Execute a wrctl instruction to the mpubase register with the mpubase.INDEX and
mpubase.D fields set to identify the MPU region.
Execute a wrctl instruction to the mpuacc register with the mpuacc.WR field set to
one and the mpuacc.RD field cleared to zero.
The MPU region write operation sets the values for mpubase.BASE, mpuacc.MASK or
mpuacc.LIMIT, mpuacc.C, and mpuacc.PERM as the new attributes for the MPU region.
Nios II Processor Reference Handbook
Chapter 3: Programming Model
Working with the MPU
February 2014 Altera Corporation

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