Altera cyclone V Technical Reference page 1441

17-226
MAC_Address14_High
Module Instance
emac0
emac1
Offset:
0xB0
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
ae sa mbc_5
RW 0x0 RW
0x0
15 14
MAC_Address14_High Fields
Bit
31
ae
30
sa
Altera Corporation
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
mbc_4 mbc_3 mbc_2
RW RW RW RW
0x0 0x0 0x0 0x0
13 12 11 10
Name
When this bit is enabled, the address filter block uses
the 15th MAC address for perfect filtering. When this
bit is disabled, the address filter block ignores the
address for filtering.
Value
0x0
0x1
When this bit is enabled, the MAC Address14[47:0] is
used to compare with the SA fields of the received
frame. When this bit is disabled, the MAC
Address14[47:0] is used to compare with the DA
fields of the received frame.
Value
0x0
0x1
Base Address
0xFF700000
0xFF702000
Bit Fields
25 24 23 22
mbc_1 mbc_0
RW RW
0x0 0x0
9 8 7 6
addrhi
RW 0xFFFF
Description
Description
Second MAC address filtering disabled
Second MAC address filtering enabled
Description
MAC address compare disabled
MAC address compare enabled
Register Address
0xFF7000B0
0xFF7020B0
21 20 19 18
Reserved
5 4 3 2
Access
Ethernet Media Access Controller
cv_5v4
2016.10.28
17 16
1 0
Reset
RW 0x0
RW 0x0
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