Altera cyclone V Technical Reference page 1472

Hard processor system

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Ethernet Media Access Controller

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Setting this bit masks the interrupt when the txoctet‐

count_g counter reaches half of the maximum value

or the maximum value.

Setting this bit masks the interrupt when the

txcarriererror counter reaches half of the maximum

value or the maximum value.

Setting this bit masks the interrupt when the

txexcesscol counter reaches half of the maximum

value or the maximum value.

Setting this bit masks the interrupt when the txlatecol

counter reaches half of the maximum value or the

maximum value.

Setting this bit masks the interrupt when the

txdeferred counter reaches half of the maximum value

or the maximum value.

MMC_Transmit_Interrupt_Mask

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

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