Altera cyclone V Technical Reference page 1466

Hard processor system

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rx1024tmaxoctgbfim

Ethernet Media Access Controller

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Setting this bit masks the interrupt when the rxpause‐

frames counter reaches half of the maximum value or

the maximum value.

Setting this bit masks the interrupt when the

rxoutofrangetype counter reaches half of the

maximum value or the maximum value.

Setting this bit masks the interrupt when the

rxlengtherror counter reaches half of the maximum

value or the maximum value.

Setting this bit masks the interrupt when the

rxunicastframes_g counter reaches half of the

maximum value or the maximum value.

Setting this bit masks the interrupt when the

rx1024tomaxoctets_gb counter reaches half of the

maximum value or the maximum value.

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

MMC_Receive_Interrupt_Mask

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