Altera cyclone V Technical Reference page 1465

Hard processor system

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MMC_Receive_Interrupt_Mask

MMC_Receive_Interrupt_Mask Fields

Altera Corporation

Setting this bit masks the interrupt when the

rxctrlframes counter reaches half the maximum value,

and also when it reaches the maximum value.

Setting this bit masks the interrupt when the

rxrcverror error counter reaches half the maximum

value, and also when it reaches the maximum value.

Setting this bit masks the interrupt when the

rxwatchdog counter reaches half of the maximum

value or the maximum value.

Setting this bit masks the interrupt when the

rxvlanframes_gb counter reaches half of the

maximum value or the maximum value.

Setting this bit masks the interrupt when the rxfifoo‐

verflow counter reaches half of the maximum value or

the maximum value.

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

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