Altera cyclone V Technical Reference page 1468

Hard processor system

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Ethernet Media Access Controller

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Setting this bit masks the interrupt when the

rxoversize_g counter reaches half of the maximum

value or the maximum value.

Setting this bit masks the interrupt when the rxunder‐

size_g counter reaches half of the maximum value or

the maximum value.

Setting this bit masks the interrupt when the

rxjabbererror counter reaches half of the maximum

value or the maximum value.

Setting this bit masks the interrupt when the

rxrunterror counter reaches half of the maximum

value or the maximum value.

Setting this bit masks the interrupt when the rxalign‐

menterror counter reaches half of the maximum value

or the maximum value.

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

MMC_Receive_Interrupt_Mask

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