Altera cyclone V Technical Reference page 1469

Hard processor system

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MMC_Receive_Interrupt_Mask

Altera Corporation

Setting this bit masks the interrupt when the

rxcrcerror counter reaches half of the maximum value

or the maximum value.

Setting this bit masks the interrupt when the rxmulti‐

castframes_g counter reaches half of the maximum

value or the maximum value.

Setting this bit masks the interrupt when the rxbroad‐

castframes_g counter reaches half of the maximum

value or the maximum value.

Setting this bit masks the interrupt when the rxoctet‐

count_g counter reaches half of the maximum value

or the maximum value.

Setting this bit masks the interrupt when the rxoctet‐

count_gb counter reaches half of the maximum value

or the maximum value.

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

counter < half max

counter >= half max or max

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