Altera cyclone V Technical Reference page 1474

cv_5v4
2016.10.28
Bit
10
txucgbfim
9
tx1024tmaxoctgbfim
8
tx512t1023octgbfim
7
tx256t511octgbfim
6
tx128t255octgbfim
Ethernet Media Access Controller
Send Feedback
Name
Setting this bit masks the interrupt when the
txunicastframes_gb counter reaches half of the
maximum value or the maximum value.
Value
0x0
0x1
Setting this bit masks the interrupt when the
tx1024tomaxoctets_gb counter reaches half of the
maximum value or the maximum value.
Value
0x0
0x1
Setting this bit masks the interrupt when the
tx512to1023octets_gb counter reaches half of the
maximum value or the maximum value.
Value
0x0
0x1
Setting this bit masks the interrupt when the
tx256to511octets_gb counter reaches half of the
maximum value or the maximum value.
Value
0x0
0x1
Setting this bit masks the interrupt when the
tx128to255octets_gb counter reaches half of the
maximum value or the maximum value.
Value
0x0
0x1
MMC_Transmit_Interrupt_Mask
Description
Description
counter < half max
counter >= half max or max
Description
counter < half max
counter >= half max or max
Description
counter < half max
counter >= half max or max
Description
counter < half max
counter >= half max or max
Description
counter < half max
counter >= half max or max
17-259
Access Reset
RW 0x0
RW 0x0
RW 0x0
RW 0x0
RW 0x0
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