Altera cyclone V Technical Reference page 1585

Hard processor system
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17-370
System_Time_Seconds
Sub_Second_Increment Fields
Bit
7:0
ssinc
System_Time_Seconds
The System Time -Seconds register, along with System-TimeNanoseconds register, indicates the current
value of the system time maintained by the MAC. Though it is updated on a continuous basis, there is
some delay from the actual time because of clock domain transfer latencies (from clk_ptp_ref_i to
l3_sp_clk).
Module Instance
emac0
emac1
Offset:
0x708
Access:
RO
31
30
15
14
System_Time_Seconds Fields
Bit
31:0
tss
Altera Corporation
Name
The value programmed in this field is accumulated
every clock cycle (of clk_ptp_i) with the contents of
the sub-second register. For example, when PTP clock
is 50 MHz (period is 20 ns), you should program 20
(0x14) when the System Time-Nanoseconds register
has an accuracy of 1 ns (TSCTRLSSR bit is set). When
TSCTRLSSR is clear, the Nanoseconds register has a
resolution of ~0.465ns. In this case, you should
program a value of 43 (0x2B) that is derived by 20ns/
0.465.
29
28
27
26
13
12
11
10
Name
The value in this field indicates the current value in
seconds of the System Time maintained by the MAC.
Description
Base Address
0xFF700000
0xFF702000
Bit Fields
25
24
23
22
tss
RO 0x0
9
8
7
6
tss
RO 0x0
Description
Access
Register Address
0xFF700708
0xFF702708
21
20
19
18
5
4
3
2
Access
Ethernet Media Access Controller
cv_5v4
2016.10.28
Reset
RW
0x0
17
16
1
0
Reset
RO
0x0
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