Altera cyclone V Technical Reference page 1546

cv_5v4
2016.10.28
Layer4_Address0 Fields
Bit
31:16
l4dp0
15:0
l4sp0
Layer3_Addr0_Reg0
For IPv4 frames, the Layer 3 Address 0 Register 0 contains the 32-bit IP Source Address field. For IPv6
frames, it contains Bits[31:0] of the 128-bit IP Source Address or Destination Address field.
Module Instance
emac0
emac1
Offset:
0x410
Access:
RW
31 30
15 14
Ethernet Media Access Controller
Send Feedback
Name
When Bit 16 (L4PEN0) is reset and Bit 20 (L4DPM0)
is set in Register 256 (Layer 3 and Layer 4 Control
Register 0), this field contains the value to be matched
with the TCP Destination Port Number field in the
IPv4 or IPv6 frames. When Bit 16 (L4PEN0) and Bit
20 (L4DPM0) are set in Register 256 (Layer 3 and
Layer 4 Control Register 0), this field contains the
value to be matched with the UDP Destination Port
Number field in the IPv4 or IPv6 frames.
Layer 4 Source Port Number Field When Bit 16
(L4PEN0) is reset and Bit 20 (L4DPM0) is set in
Register 256 (Layer 3 and Layer 4 Control Register 0),
this field contains the value to be matched with the
TCP Source Port Number field in the IPv4 or IPv6
frames. When Bit 16 (L4PEN0) and Bit 20 (L4DPM0)
are set in Register 256 (Layer 3 and Layer 4 Control
Register 0), this field contains the value to be matched
with the UDP Source Port Number field in the IPv4
or IPv6 frames.
0xFF700000
0xFF702000
29 28 27 26
13 12 11 10
Description
Base Address
Bit Fields
25 24 23 22
l3a00
RW 0x0
9 8 7 6
l3a00
RW 0x0
Layer3_Addr0_Reg0
Access
Register Address
0xFF700410
0xFF702410
21 20 19 18
5 4 3 2
17-331
Reset
RW 0x0
RW 0x0
17 16
1 0
Altera Corporation