Altera cyclone V Technical Reference page 1521

17-306
MMC_IPC_Receive_Interrupt
Bit
16
rxipv4gois
13
rxicmperfis
12
rxicmpgfis
11
rxtcperfis
10
rxtcpgfis
Altera Corporation
Name
This bit is set when the rxipv4_gd_octets counter
reaches half of the maximum value or the maximum
value.
Value
0x0
0x1
This bit is set when the rxicmp_err_frms counter
reaches half of the maximum value or the maximum
value.
Value
0x0
0x1
This bit is set when the rxicmp_gd_frms counter
reaches half of the maximum value or the maximum
value.
Value
0x0
0x1
This bit is set when the rxtcp_err_frms counter
reaches half of the maximum value or the maximum
value.
Value
0x0
0x1
This bit is set when the rxtcp_gd_frms counter
reaches half of the maximum value or the maximum
value.
Value
0x0
0x1
Description
Description
counter < half max
counter >= half max or max
Description
counter < half max
counter >= half max or max
Description
counter < half max
counter >= half max or max
Description
counter < half max
counter >= half max or max
Description
counter < half max
counter >= half max or max
2016.10.28
Access Reset
RO 0x0
RO 0x0
RO 0x0
RO 0x0
RO 0x0
Ethernet Media Access Controller
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