Altera cyclone V Technical Reference page 1591

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System_Time_Higher_Word_Seconds
System_Time_Higher_Word_Seconds
System time higher word
Module Instance
emac0
emac1
Offset:
0x724
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
15 14
System_Time_Higher_Word_Seconds Fields
Bit
15:0
tshwr
Timestamp_Status
Timestamp status. All bits except Bits[27:25] get cleared when the host reads this register.
Module Instance
emac0
emac1
Offset:
0x728
Access:
RO
Altera Corporation
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
Name
This field contains the most significant 16-bits of the
timestamp seconds value. The register is directly
written to initialize the value. This register is
incremented when there is an overflow from the 32-
bits of the System Time - Seconds register.
Base Address
0xFF700000
0xFF702000
Bit Fields
25 24 23 22
Reserved
9 8 7 6
tshwr
RW 0x0
Description
Base Address
0xFF700000
0xFF702000
Register Address
0xFF700724
0xFF702724
21 20 19 18
5 4 3 2
Access
Register Address
0xFF700728
0xFF702728
Ethernet Media Access Controller
cv_5v4
2016.10.28
17 16
1 0
Reset
RW 0x0
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