Altera cyclone V Technical Reference page 1559

Hard processor system
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17-344
L3_L4_Control2
Bit
10:6
l3hsbm2
5
l3daim2
4
l3dam2
3
l3saim2
2
l3sam2
0
l3pen2
Altera Corporation
Name
Layer 3 IP SA Higher Bits Match IPv4 Frames: This
field contains the number of lower bits of IP Source
Address that are masked for matching in the IPv4
frames. The following list describes the values of this
field: * 0: No bits are masked. * 1: LSb[0] is masked. *
2: Two LSbs [1:0] are masked. * ... * 31: All bits except
MSb are masked. IPv6 Frames: This field contains Bits
[4:0] of the field that indicates the number of higher
bits of IP Source or Destination Address matched in
the IPv6 frames. This field is valid and applicable only
if L3DAM2 or L3SAM2 is set high.
When set, this bit indicates that the Layer 3 IP
Destination Address field is enabled for inverse
matching. When reset, this bit indicates that the Layer
3 IP Destination Address field is enabled for perfect
matching. This bit is valid and applicable only when
Bit 4 (L3DAM2) is set high.
When set, this bit indicates that Layer 3 IP Destina‐
tion Address field is enabled for matching. When
reset, the MAC ignores the Layer 3 IP Destination
Address field for matching. Note: When Bit 0
(L3PEN2) is set, you should set either this bit or Bit 2
(L3SAM2) because either IPv6 DA or SA can be
checked for filtering.
When set, this bit indicates that the Layer 3 IP Source
Address field is enabled for inverse matching. When
reset, this bit indicates that the Layer 3 IP Source
Address field is enabled for perfect matching. This bit
is valid and applicable only when Bit 2 (L3SAM2) is
set high.
When set, this bit indicates that the Layer 3 IP Source
Address field is enabled for matching. When reset, the
MAC ignores the Layer 3 IP Source Address field for
matching. Note: When Bit 0 (L3PEN2) is set, you
should set either this bit or Bit 4 (L3DAM2) because
either IPv6 SA or DA can be checked for filtering.
When set, this bit indicates that the Layer 3 IP Source
or Destination Address matching is enabled for the
IPv6 frames. When reset, this bit indicates that the
Layer 3 IP Source or Destination Address matching is
enabled for the IPv4 frames. The Layer 3 matching is
done only when either L3SAM2 or L3DAM2 bit is set
high.
Description
2016.10.28
Access
Reset
RW
0x0
RW
0x0
RW
0x0
RW
0x0
RW
0x0
RW
0x0
Ethernet Media Access Controller
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cv_5v4

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