Altera cyclone V Technical Reference page 1522

cv_5v4
2016.10.28
Bit
9
rxudperfis
8
rxudpgfis
7
rxipv6nopayfis
6
rxipv6herfis
5
rxipv6gfis
Ethernet Media Access Controller
Send Feedback
Name
This bit is set when the rxudp_err_frms counter
reaches half of the maximum value or the maximum
value.
Value
0x0
0x1
This bit is set when the rxudp_gd_frms counter
reaches half of the maximum value or the maximum
value.
Value
0x0
0x1
This bit is set when the rxipv6_nopay_frms counter
reaches half of the maximum value or the maximum
value.
Value
0x0
0x1
This bit is set when the rxipv6_hdrerr_frms counter
reaches half of the maximum value or the maximum
value.
Value
0x0
0x1
This bit is set when the rxipv6_gd_frms counter
reaches half of the maximum value or the maximum
value.
Value
0x0
0x1
Description
Description
counter < half max
counter >= half max or max
Description
counter < half max
counter >= half max or max
Description
counter < half max
counter >= half max or max
Description
counter < half max
counter >= half max or max
Description
counter < half max
counter >= half max or max
MMC_IPC_Receive_Interrupt
Access
RO
RO
RO
RO
RO
Altera Corporation
17-307
Reset
0x0
0x0
0x0
0x0
0x0