Altera cyclone V Technical Reference page 1518

cv_5v4
2016.10.28
31 30
Reserved rxicm
peroi
0x0
15 14
Reserved rxicm
perfi
0x0
MMC_IPC_Receive_Interrupt Fields
Bit
29
rxicmperois
28
rxicmpgois
27
rxtcperois
Ethernet Media Access Controller
Send Feedback
29 28 27 26
rxicm rxtcp rxtcp
pgois erois gois
s
RO RO RO
RO 0x0 0x0 0x0
13 12 11 10
rxicm rxtcp rxtcp
pgfis erfis gfis
s
RO RO RO
RO 0x0 0x0 0x0
Name
This bit is set when the rxicmp_err_octets counter
reaches half of the maximum value or the maximum
value.
Value
0x0
0x1
This bit is set when the rxicmp_gd_octets counter
reaches half of the maximum value or the maximum
value.
Value
0x0
0x1
This bit is set when the rxtcp_err_octets counter
reaches half of the maximum value or the maximum
value.
Value
0x0
0x1
Bit Fields
25 24 23 22
rxudp rxudp rxipv rxipv
erois gois 6nopa 6hero
yois is
RO RO
0x0 0x0 RO RO
0x0 0x0
9 8 7 6
rxudp rxudp rxipv rxipv
erfis gfis 6nopa 6herf
yfis is
RO RO
0x0 0x0 RO RO
0x0 0x0
Description
Description
counter < half max
counter >= half max or max
Description
counter < half max
counter >= half max or max
Description
counter < half max
counter >= half max or max
MMC_IPC_Receive_Interrupt
21 20 19 18
rxipv rxipv rxipv rxipv
6gois 4udsb 4frag 4nopa
lois ois yois
RO
0x0 RO RO RO
0x0 0x0 0x0
5 4 3 2
rxipv rxipv rxipv rxipv
6gfis 4udsb 4frag 4nopa
lfis fis yfis
RO
0x0 RO RO RO
0x0 0x0 0x0
Access
17-303
17 16
rxipv rxipv4go
4hero is
is
RO 0x0
RO
0x0
1 0
rxipv rxipv4gf
4herf is
is
RO 0x0
RO
0x0
Reset
RO 0x0
RO 0x0
RO 0x0
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