Altera cyclone V Technical Reference page 1578

Hard processor system

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VLAN_Hash_Table_Reg

The 16-bit Hash table is used for group address filtering based on VLAN tag when Bit 18 (VTHM) of

VLAN ID (based on Bit 16 (ETV) of VLAN Tag Register) in the incoming frame is passed through the

CRC logic and the upper four bits of the calculated CRC are used to index the contents of the VLAN Hash

table. For example, a hash value of 4b'1000 selects Bit 8 of the VLAN Hash table. The hash value of the

destination address is calculated in the following way: 1. Calculate the 32-bit CRC for the VLAN tag or ID

(See IEEE 802.3, Section 3.2.8 for the steps to calculate CRC32). 2. Perform bitwise reversal for the value

obtained in Step 1. 3. Take the upper four bits from the value obtained in Step 2. If the corresponding bit

value of the register is 1'b1, the frame is accepted. Otherwise, it is rejected. Because the Hash Table register

is double-synchronized to the (G)MII clock domain, the synchronization is triggered only when Bits[15:8]

(in little-endian mode) or Bits[7:0] (in big-endian mode) of this register are written. Notes: * Because of

double-synchronization, consecutive writes to this register should be performed after at least four clock

cycles in the destination clock domain.

Module Instance

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by

VLAN_Hash_Table_Reg Fields

Timestamp_Control

This register controls the operation of the System Time generator and the processing of PTP packets for

timestamping in the Receiver.

Ethernet Media Access Controller

Send Feedback

software or hardware. Any area of the memory map that is not explicitly defined as a register

space or accessible memory is considered reserved.

This field contains the 16-bit VLAN Hash Table.

Base Address

VLAN_Hash_Table_Reg

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