Altera cyclone V Technical Reference page 1547

17-332
Layer3_Addr1_Reg0
Layer3_Addr0_Reg0 Fields
Bit
31:0
l3a00
Layer3_Addr1_Reg0
For IPv4 frames, the Layer 3 Address 1 Register 0 contains the 32-bit IP Destination Address field. For
IPv6 frames, it contains Bits[63:32] of the 128-bit IP Source Address or Destination Address field.
Module Instance
emac0
emac1
Offset:
0x414
Access:
RW
31 30
15 14
Altera Corporation
Name
When Bit 0 (L3PEN0) and Bit 2 (L3SAM0) are set in
Register 256 (Layer 3 and Layer 4 Control Register 0),
this field contains the value to be matched with
Bits[31:0] of the IP Source Address field in the IPv6
frames. When Bit 0 (L3PEN0) and Bit 4 (L3DAM0)
are set in Register 256 (Layer 3 and Layer 4 Control
Register 0), this field contains the value to be matched
with Bits [31:0] of the IP Destination Address field in
the IPv6 frames. When Bit 0 (L3PEN0) is reset and
Bit 2 (L3SAM0) is set in Register 256 (Layer 3 and
Layer 4 Control Register 0), this field contains the
value to be matched with the IP Source Address field
in the IPv4 frames.
29 28 27 26
13 12 11 10
Description
Base Address
0xFF700000
0xFF702000
Bit Fields
25 24 23 22
l3a10
RW 0x0
9 8 7 6
l3a10
RW 0x0
Access
Register Address
0xFF700414
0xFF702414
21 20 19 18
5 4 3 2
Ethernet Media Access Controller
cv_5v4
2016.10.28
Reset
RW 0x0
17 16
1 0
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