Altera cyclone V Technical Reference page 1586

cv_5v4
2016.10.28
System_Time_Nanoseconds
The value in this field has the sub second representation of time, with an accuracy of 0.46 ns. When
TSCTRLSSR is set, each bit represents 1 ns and the maximum value is 0x3B9A_C9FF, after which it rolls-
over to zero.
Module Instance
emac0
emac1
Offset:
0x70C
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
Reserved
15 14
System_Time_Nanoseconds Fields
Bit
30:0
tsss
System_Time_Seconds_Update
The System Time - Seconds Update register, along with the System Time - Nanoseconds Update register,
initializes or updates the system time maintained by the MAC. You must write both of these registers
before setting the TSINIT or TSUPDT bits in the Timestamp Control register.
Module Instance
emac0
Ethernet Media Access Controller
Send Feedback
0xFF700000
0xFF702000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
Name
The value in this field has the sub second representa‐
tion of time, with an accuracy of 0.46 ns. When bit 9
(TSCTRLSSR) is set in Register 448 (Timestamp
Control Register), each bit represents 1 ns and the
maximum value is 0x3B9A_C9FF, after which it rolls-
over to zero.
0xFF700000
Base Address
Bit Fields
25 24 23 22
tsss
RO 0x0
9 8 7 6
tsss
RO 0x0
Description
Base Address
System_Time_Nanoseconds
Register Address
0xFF70070C
0xFF70270C
21 20 19 18
5 4 3 2
Access
Register Address
0xFF700710
17-371
17 16
1 0
Reset
RO 0x0
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