Altera cyclone V Technical Reference page 1600

cv_5v4
2016.10.28
PPS0_Width Fields
Bit
31:0
ppswidth
MAC_Address16_High
The MAC Address16 High register holds the upper 16 bits of the 17th 6-byte MAC address of the station.
Because the MAC address registers are configured to be double-synchronized to the (G)MII clock
domains, the synchronization is triggered only when bits[31:24] (in little-endian mode) or Bits[7:0] (in
big-endian mode) of the MAC Address16 Low Register are written. For proper synchronization updates,
the consecutive writes to this Address Low Register should be performed after at least four clock cycles in
the destination clock domain. Note that all MAC Address High registers (except MAC Address0 High)
have the same format.
Module Instance
emac0
emac1
Offset:
0x800
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
ae sa mbc_5
RW 0x0 RW
0x0 0x0
15 14
Ethernet Media Access Controller
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Name
These bits store the width between the rising edge and
corresponding falling edge of the PPS0 signal output
in terms of units of sub-second increment value. You
need to program one value less than the required
interval. For example, if PTP reference clock is 50
MHz (period of 20ns), and desired width between the
rising and corresponding falling edges of PPS0 signal
output is 80ns (that is, four units of sub-second
increment value), then you should program value 3
(4-1) in this register. Note: The value programmed in
this register must be lesser than the value
programmed in Register 472 (PPS0 Interval Register).
0xFF700000
0xFF702000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
mbc_4 mbc_3 mbc_2
RW RW RW RW
0x0 0x0 0x0
13 12 11 10
Description
Base Address
Bit Fields
25 24 23 22
mbc_1 mbc_0
RW RW
0x0 0x0
9 8 7 6
addrhi
RW 0xFFFF
MAC_Address16_High
Access
Register Address
0xFF700800
0xFF702800
21 20 19 18
Reserved
5 4 3 2
17-385
Reset
RW 0x0
17 16
1 0
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